On Thu, Mar 14, 2019 at 03:01:33PM +0100, Jerome Brunet wrote:
> Add documentation for the device tree bindings of the MDIO mux of Amlogic
> g12a SoC family
>
> Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> ---
> .../bindings/net/mdio-mux-meson-g12a.txt | 48 +++++++++++++++++++
> 1 file changed, 48 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt
>
> diff --git a/Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt b/Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt
> new file mode 100644
> index 000000000000..e738bba6a9de
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt
> @@ -0,0 +1,48 @@
> +Properties for the MDIO bus multiplexer/glue of Amlogic G12a SoC family.
> +
> +This is a special case of a MDIO bus multiplexer. It allows to choose between
> +the internal mdio bus leading to the embedded 10/100 PHY or the external
> +MDIO bus.
> +
> +Required properties in addition to the generic multiplexer properties:
> +- compatible : amlogic,g12a-mdio-mux
> +- reg: physical address and length of the multiplexer/glue registers
> +- clocks: list of clock phandle, one for each entry clock-names.
> +- clock-names: should contain the following:
> + * "pclk" : peripheral clock.
> + * "clkin0" : platform crytal
> + * "clkin1" : SoC 50MHz MPLL
> +
> +Example :
> +
> +mdio-mux: mdio-multiplexer@4c000 {
> + compatible = "amlogic,g12a-mdio-mux";
> + reg = <0x0 0x4c000 0x0 0xa4>;
> + clocks = <&clkc CLKID_ETH_PHY>,
> + <&xtal>,
> + <&clkc CLKID_MPLL_5OM>;
> + clock-names = "pclk", "clkin0", "clkin1";
> + mdio-parent-bus = <&mdio0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ext_mdio: mdio@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + int_mdio: mdio@1 {
> + reg = <1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + internal_ephy: ethernet_phy@8 {
ethernet-phy@8
Otherwise,
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
> + compatible = "ethernet-phy-id0180.3301",
> + "ethernet-phy-ieee802.3-c22";
> + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + reg = <8>;
> + max-speed = <100>;
> + };
> + };
> +};
> --
> 2.20.1
>
