On Thu, 2019-03-21 at 23:15 +0530, Vignesh Raghavendra wrote: > > HyperFlash devices are compliant with CFI AMD/Fujitsu Extended Command > Set(0x0002) for flash operations, therefore drivers/mtd/chips/cfi_cmdset_0002.c > can be use as is. But these devices do not support DQ polling method of > determining chip ready/good status. These flashes provide Status > Register whose bits can be polled to know status of flash operation. > > Cypress HyperFlash datasheet here[1], talks about CFI Amd/Fujitsu > Extended Query version 1.5. Bit 0 of "Software Features supported" field > of CFI Primary Vendor-Specific Extended Query table indicates > presence/absence of status register and Bit 1 indicates whether or not > DQ polling is supported. Using these bits, its possible to determine > whether flash supports DQ polling or need to use Status Register. > > Add support for polling status register to know device ready/status of > erase/write operations when DQ polling is not supported. Isn't this new Status scheme just a copy of Intels(cmdset_0001)? If so I think the new status impl. in 0002 should borrow from 0001 as this is a hardened and battle tested impl. I know other modern 0002 chips supports both old and new impl. of Status and I world guess that we will see more chips with new Status only. Jocke
