On Wednesday, March 20, 2019 12:09:05 PM CET Michal Vokáč wrote: > The switch is accessible through pseudo PHY which is located at 0x10. from what I know the switch@0 came from John' original qca8k submission patch <https://lore.kernel.org/patchwork/patch/715974/> (this is v1! not the later version) In this version, the qca8k_sw_probe() function used read the MII_PHYID1 and 2 from the PHY0 in order to identify the switch (much like ar8216.c / ar8327.c switchdev does): | /* sw_addr is irrelevant as the switch occupies the MDIO bus from | * addresses 0 to 4 (PHYs) and 16-23 (for MDIO 32bits protocol). So | * we'll probe address 0 to see if we see the right switch family. | */ | phy_id = mdiobus_read(mdiodev->bus, 0, MII_PHYSID1) << 16; | phy_id |= mdiobus_read(mdiodev->bus, 0, MII_PHYSID2); | | switch (phy_id) { | case PHY_ID_QCA8337: | break; | default: | return -ENODEV; | } However, this code was changed in v2. Probably because if the PHY is put in isolation and powered down the MII_PHYID1 and 2 will read "0xffff". So the discovery would no longer worked on systems that purposely disable the switch during the bootloader-handoff procedure (like the Meraki MX60). > Signed-off-by: Michal Vokáč <michal.vokac@xxxxxxxxx> > --- > arch/arm/boot/dts/imx6dl-yapp4-common.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi > index 091d829f6b05..e8d800fec637 100644 > --- a/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi > +++ b/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi > @@ -114,9 +114,9 @@ > reg = <2>; > }; > > - switch@0 { > + switch@10 { > compatible = "qca,qca8334"; > - reg = <0>; > + reg = <10>; > > switch_ports: ports { > #address-cells = <1>; >
