This patch need based on v5.0-rc1 and these series http://lists.infradead.org/pipermail/linux-mediatek/2019-February/017570.html http://lists.infradead.org/pipermail/linux-mediatek/2019-February/017320.html http://lists.infradead.org/pipermail/linux-mediatek/2019-January/017196.html http://lists.infradead.org/pipermail/linux-mediatek/2019-March/018005.html add gce device node for mt8183 Signed-off-by: Bibby Hsieh <bibby.hsieh@xxxxxxxxxxxx> --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 165b859..5006368 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/clock/mt8183-clk.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gce/mt8183-gce.h> #include "mt8183-pinfunc.h" / { @@ -238,6 +239,18 @@ clock-names = "spi", "wrap"; }; + gce: gce@10238000 { + compatible = "mediatek,mt8183-gce"; + reg = <0 0x10238000 0 0x4000>; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>; + thread-num = <CMDQ_THR_MAX_COUNT>; + #mbox-cells = <3>; + #gce-event-cells = <1>; + #gce-subsys-cells = <2>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt8183-uart", "mediatek,mt6577-uart"; -- 1.9.1
