On 21/02/19 4:11 PM, Bean Huo (beanhuo) wrote: > Hi, Vignesh > >> >> Cadence OSPI controller IP supports Octal IO (x8 IO lines), It also has an >> integrated PHY. IP register layout is very similar to existing QSPI IP except for >> additional bits to support Octal and Octal DDR mode. Therefore, extend >> current driver to support Octal mode. Only Octal SDR read (1-1-8)mode is >> supported for now. > > Does this your Cadence OSPI controller support 8-8-8 IO mode, if yes, > Why not directly enable 8-8-8 mode? > Yes.. IP also supports 8-8-8 DTR mode. But supporting those modes require enabling, configuring and calibrating OSPI PHY module within the IP. I am planning to do that, after moving driver over to spi-mem layer. >> Tested with mt35xu512aba Octal flash on TI's AM654 EVM. >> >> Signed-off-by: Vignesh R <vigneshr@xxxxxx> >> ______________________________________________________ >> Linux MTD discussion mailing list >> http://lists.infradead.org/mailman/listinfo/linux-mtd/ > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ > -- Regards Vignesh
