On 14/02/19 10:37, Linus Walleij wrote: > On Thu, Feb 14, 2019 at 4:13 AM Suman Anna <s-anna@xxxxxx> wrote: >> [Me] > >>> To be able to use hierarchical interrupt domain in the kernel, the top >>> interrupt controller must use the hierarchical (v2) irqdomain, so >>> if this is anything else than the ARM GIC it will be an interesting >>> undertaking to handle this. >> >> These are interrupt lines coming towards the host processor running >> Linux and are directly connected to the ARM GIC. This INTC module is >> actually an PRUSS internal interrupt controller that can take in 64 (on >> most SoCs) external events/interrupt sources and multiplexing them >> through two layers of many-to-one events-to-intr channels & >> intr-channels-to-host interrupts. Couple of the host interrupts go to >> the PRU cores themselves while the remaining ones come out of the IP to >> connect to other GICs in the SoC. > > If the muxing is static (like set up once at probe) so that while the system is > running, there is one and one only event mapped to the GIC from > the component below it, then it is hierarchical. This is how it looks. [GIC]<---8---[INTC]<---64---[events from peripherals] The 8 interrupt lines from INTC to the GIC are 1:1 mapped and fixed per SoC. The muxing between 64 inputs to INTC and its 8 outputs are programmable and might not necessarily be static per boot/probe as it depends on what firmware is loaded on the PRU. A typical PRUSS use case will usually use just one firmware per boot but if required it can switch at runtime and the muxing might change. > >> We have implemented this as an irqchip using chained interrupt handlers >> with the consumers using the event numbers on the Linux-side. The PRUs >> also access some of the associated registers for clearing an event source. > > Chaining with cascading is when two or more interrupts fire the > same upper level (say GIC) IRQ. If there is a 1:1 mapping, > it is not chained/cascaded but hierarchical. > > I understand you used old irqdomain/chip frameworks in the past, > because everyone was working around the fact that they didn't have > an abstraction for hierarchical IRQs. Using chained interrupts > and custom 1:1 maps and assigning a long list of IRQs like this > patch does was the most common workaround. But we should > step out of that habit now. > > Different levels of the IRQ handling having to do different stuff is > what hierarchical irqdomains do best, so it sounds like a good fit. > > We handle some stuff at our level of the hierarchy and then fall > up to the next higher level using calls such as > irq_chip_ack_parent(), irq_chip_mask_parent() and friends. > > Yours, > Linus Walleij > -- cheers, -roger Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
