On Wed, Feb 13, 2019 at 01:02:22PM +0200, Claudiu Manoil wrote:
> The LS1028A RDB board features an Atheros PHY connected over
> SGMII to the ENETC PF0 (or Port0). ENETC Port1 (PF1) has no
> external connection on this board, so it can be disabled for now.
>
> Signed-off-by: Alex Marginean <alexandru.marginean@xxxxxxx>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> index fdeb417..c8487893 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
> @@ -71,3 +71,18 @@
> &duart1 {
> status = "okay";
> };
> +
> +&enetc_port0 {
> + phy-handle = <&sgmii_phy0>;
> + phy-connection-type = "sgmii";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sgmii_phy0: ethernet-phy@2 {
> + reg = <0x2>;
> + };
> +};
> +
Hi Claudiu
It is better to use:
&enetc_port0 {
phy-handle = <&sgmii_phy0>;
phy-connection-type = "sgmii";
#address-cells = <1>;
#size-cells = <0>;
mdio {
sgmii_phy0: ethernet-phy@2 {
reg = <0x2>;
};
};
};
Andrew
