Add ddr performance monitor
Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 4c3dd95..243d7b3 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -79,6 +79,13 @@
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
+ ddr_pmu0: ddr_pmu@5c020000 {
+ compatible = "fsl,imx8-ddr-pmu";
+ reg = <0x0 0x5c020000 0x0 0x10000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.5.2
