On Thu, Feb 07, 2019 at 11:13:03AM +0100, Geert Uytterhoeven wrote: > On Thu, Feb 7, 2019 at 9:37 AM Biju Das <biju.das@xxxxxxxxxxxxxx> wrote: > > Silicon Linux CAT 874 board has 2GB DDR memory. Update the dma-ranges > > mapping for pciec0 node. Also declare pcie bus clock, since it is > > generated on the CAT874 main board. > > > > Signed-off-by: Biju Das <biju.das@xxxxxxxxxxxxxx> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx> Thanks, applied for v5.1.
