Re: [PATCH v5 09/10] arm64: dts: qcom: Add AOSS QMP node

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Hey Bjorn,

Tested-by: Sibi Sankar <sibis@xxxxxxxxxxxxxx>
Reviewed-by: Sibi Sankar <sibis@xxxxxxxxxxxxxx>


On 01/31/2019 06:09 AM, Bjorn Andersson wrote:
The AOSS QMP provides a number of power domains, used for QDSS and
PIL, add the node for this.

Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
---

Changes since v4:
- None

Changes since v3:
- None

  arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++
  1 file changed, 10 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 07d9cd6fba7d..dc43fee8bb90 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -14,6 +14,7 @@
  #include <dt-bindings/interconnect/qcom,sdm845.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/phy/phy-qcom-qusb2.h>
+#include <dt-bindings/power/qcom-aoss-qmp.h>
  #include <dt-bindings/power/qcom-rpmpd.h>
  #include <dt-bindings/reset/qcom,sdm845-aoss.h>
  #include <dt-bindings/reset/qcom,sdm845-pdc.h>
@@ -2076,6 +2077,15 @@
  			#reset-cells = <1>;
  		};
+ aoss_qmp: qmp@c300000 {
+			compatible = "qcom,sdm845-aoss-qmp";
+			reg = <0 0x0c300000 0 0x100000>;
+			interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+			mboxes = <&apss_shared 0>;
+
+			#power-domain-cells = <1>;
+		};
+
  		spmi_bus: spmi@c440000 {
  			compatible = "qcom,spmi-pmic-arb";
  			reg = <0 0x0c440000 0 0x1100>,


--
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