Hi Andrew, On Sat, Jan 26, 2019 at 04:03:20PM +0100, Andrew Lunn wrote: > On Sat, Jan 26, 2019 at 09:40:36AM +0530, Manivannan Sadhasivam wrote: > > Hello, > > > > This patchset adds initial support for Bitmain BM1880 SoC and Sophon > > Edge board. BM1880 SoC consists of a Dual Core ARM Cortex A53 Application > > processor subsystem, a single core RISC-V subsystem and a Tensor > > Processor subsystem. > > Hi Manivannan > > Interesting combination of CPUs. > > > This patchset adds support for only ARM Cortex A53 Application > > processor subsystem with UART, which enables the board to boot into > > initramfs with 2 CPUs. > > Looking forward, what sharing do you expect at the device tree level? > > Looking at > > https://sophon-file.bitmain.com.cn/sophon-prod/drive/18/11/06/19/BM1880%20product%20brief%20V0.04_Chinese%20versionV0.06.pdf > > it appears all the devices can be shared between the CPUs. So do you > plan to have a shared .dtsi file somewhere? > > Is ARCH_BITMAIN going to be both ARM64 and RISC-V? > We don't have any plan to add support for RISC-V subsystem. Moreover, from the SoC product brief it look like the RISC-V core is a MCU grade core, so I doubt whether we can run linux on it! It might be a candidate for RTOS. For now, ARCH_BITMAIN is going to have only ARM64 support. Thanks, Mani > Thanks > Andrew
