On Mon, Jan 21, 2019 at 08:22:26PM +0800, min.guo@xxxxxxxxxxxx wrote:
> From: Min Guo <min.guo@xxxxxxxxxxxx>
>
> This adds support for MediaTek musb controller in
> host, peripheral and otg mode.
>
> Signed-off-by: Min Guo <min.guo@xxxxxxxxxxxx>
> ---
> changes in v4:
> suggested by Sergei:
> 1. String alignment
>
> changes in v3:
> 1. no changes
>
> changes in v2:
> suggested by Bin:
> 1. Modify DRC to DRD
> suggested by Rob:
> 2. Drop the "<soc-model>-musb" in compatible
This is not what I said. I gave you the exact text to put.
> 3. Remove phy-names
> 4. Add space after comma in clock-names
> ---
> .../devicetree/bindings/usb/mediatek,musb.txt | 43 ++++++++++++++++++++++
> 1 file changed, 43 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/usb/mediatek,musb.txt
>
> diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.txt b/Documentation/devicetree/bindings/usb/mediatek,musb.txt
> new file mode 100644
> index 0000000..4305770
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/mediatek,musb.txt
> @@ -0,0 +1,43 @@
> +MediaTek musb DRD/OTG controller
> +-------------------------------------------
> +
> +Required properties:
> + - compatible : should be "mediatek,mtk-musb"
> + - reg : specifies physical base address and size of
> + the registers
> + - interrupts : interrupt used by musb controller
> + - interrupt-names : must be "mc"
> + - phys : PHY specifier for the OTG phy
> + - dr_mode : should be one of "host", "peripheral" or "otg",
> + refer to usb/generic.txt
> + - clocks : a list of phandle + clock-specifier pairs, one for
> + each entry in clock-names
> + - clock-names : must contain "main", "mcu", "univpll"
> + for clocks of controller
> +
> +Optional properties:
> + - extcon : external connector for VBUS and ID pin changes detection,
> + needed when supports dual-role mode
Again, do not use extcon in new bindings.
> + - vbus-supply : reference to the VBUS regulator, needed when supports
> + dual-role mode
> + - power-domains : a phandle to USB power domain node to control USB's
> + MTCMOS
> +
> +Example:
> +
> +usb2: usb@11200000 {
> + compatible = "mediatek,mt2701-musb",
> + "mediatek,mtk-musb";
> + reg = <0 0x11200000 0 0x1000>;
> + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
> + interrupt-names = "mc";
> + phys = <&u2port2 PHY_TYPE_USB2>;
> + vbus-supply = <&usb_vbus>;
> + extcon = <&extcon_usb>;
> + dr_mode = "otg";
> + clocks = <&pericfg CLK_PERI_USB0>,
> + <&pericfg CLK_PERI_USB0_MCU>,
> + <&pericfg CLK_PERI_USB_SLV>;
> + clock-names = "main","mcu","univpll";
> + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
> +};
> --
> 1.9.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
