> From: Marc Zyngier [mailto:marc.zyngier@xxxxxxx] > Sent: Friday, January 18, 2019 5:39 PM > On 18/01/2019 08:48, Lucas Stach wrote: > > Am Freitag, den 18.01.2019, 07:53 +0000 schrieb Aisheng Dong: > >> Not all 64 interrupts may be used in one group. e.g. most irqsteer in > >> imx8qxp and imx8qm subsystems supports only 32 interrupts. > >> > >> As the IP integration parameters are Channel number and interrupts > >> number, let's use fsl,irqs-per-chan to represents how many interrupts > >> supported by this irqsteer channel. > > > > Sorry, but total NACK. I've got to great lengths with dumping the > > actually implemented register layout on i.MX8M and AFAICS the IRQs are > > always managed in groups of 64 IRQs, even if less than that are > > connected as input IRQs. This is what the actually present register > > set on i.MX8M tells us. > > Also, I'd really like the DT bindings not to change at every release. So whatever > change (if any) has to be done for this driver to support existing HW, please > make sure that the DT bindings are kept as stable as possible. > Sorry I should clarify it a bit. There's still no users in Devicetree. So I guess we can update it, right? Or not? Regards Dong Aisheng > Thanks, > > M. > -- > Jazz is not dead. It just smells funny...
