Hi Guido,
Am Montag, den 14.01.2019, 17:30 +0100 schrieb Guido Günther:
> We can reuse the pwm from fsl,imx27-pwm as with other imx SOCs.
>
> > Signed-off-by: Guido Günther <agx@xxxxxxxxxxx>
> ---
> This is against linux-next (next-20190114)
>
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 44 +++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 8e9d6d5ed7b2..53ed0bdfc06a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -252,6 +252,50 @@
> > clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
> > status = "disabled";
> > };
> +
> > > + pwm1: pwm@30660000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30660000 0x10000>;
> > + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM1_ROOT>,
> + <&clk IMX8MQ_CLK_PWM1_ROOT>;
Please align the second entry with the first one,as with all the other
nodes in this file.
> + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> > + };
> +
> > > + pwm2: pwm@30670000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30670000 0x10000>;
> > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM2_ROOT>,
> > + <&clk IMX8MQ_CLK_PWM2_ROOT>;
> > + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> > + };
> +
> > > + pwm3: pwm@30680000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30680000 0x10000>;
> > + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM3_ROOT>,
> > + <&clk IMX8MQ_CLK_PWM3_ROOT>;
> > + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> > + };
> +
> > > + pwm4: pwm@30690000 {
> > + compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
> > + reg = <0x30690000 0x10000>;
> > + interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clk IMX8MQ_CLK_PWM4_ROOT>,
> > + <&clk IMX8MQ_CLK_PWM4_ROOT>;
> > + clock-names = "ipg", "per";
> > + #pwm-cells = <2>;
> > + status = "disabled";
> + };
All those addresses are within the AIPS2 bus range, so this patch adds
them to the wrong bus.
Regards,
Lucas
> };
>
> > bus@30400000 { /* AIPS2 */
