On Mon, 7 Jan 2019 11:28:05 +0800, Joseph Lo wrote: > The Tegra210 timer provides fourteen 29-bit timer counters and one 32-bit > timestamp counter. The TMRs run at either a fixed 1 MHz clock rate derived > from the oscillator clock (TMR0-TMR9) or directly at the oscillator clock > (TMR10-TMR13). Each TMR can be programmed to generate one-shot periodic, > or watchdog interrupts. > > Cc: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx> > Cc: linux-kernel@xxxxxxxxxxxxxxx > Cc: devicetree@xxxxxxxxxxxxxxx > Signed-off-by: Joseph Lo <josephl@xxxxxxxxxx> > --- > .../bindings/timer/nvidia,tegra210-timer.txt | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
