Quoting Jorge Ramirez (2018-12-21 13:45:41) > On 12/21/18 22:40, Stephen Boyd wrote: > > Quoting Jorge Ramirez (2018-12-21 11:45:28) > >> On 12/21/18 20:28, Bjorn Andersson wrote: > >>> Perhaps there's a better way to define that this particular clock > >>> hardware can change rate, but in this implementation it must not? > >> the initialization for this particular PLL on this particular platform > >> is wrong > >> as the interface does not apply to the platform needs even though it is an > >> alpha_pll > >> > >> if the VCO is not an option -even though it reflects the platform > >> constrains- > >> I would suggest nullifying the alpha_pll_ops that do not apply to this > >> platform: > >> ie: set_rate, round_rate set to null in the probe. > >> > >> allowing the interface calls (ops) to go through to later on make them fail > >> based on some setting would be fundamentally wrong IMO > >> > > We have clk_alpha_pll_postdiv_ro_ops so maybe just add another set of > > those for the alpha_pll itself? > > > > > > something like > clk_alpha_pll_fixed_ops? Either way works. We're not consistent in naming now that we have clk_alpha_pll_fixed_fabia_ops.
