Re: [PATCH v3 1/2] ARM: dts: r7s9210: Initial SoC device tree

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Rob,

On Wed, Dec 19, 2018 at 3:07 PM Rob Herring <robh@xxxxxxxxxx> wrote:
> On Tue, Dec 18, 2018 at 9:05 AM Rob Herring <robh@xxxxxxxxxx> wrote:
> > On Mon, Dec 17, 2018 at 09:43:23AM -0500, Chris Brandt wrote:
> > > Basic support for the RZ/A2 (R7S9210) SoC.
> > >
> > > Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx>
> > > ---
>
> > > +     gic: interrupt-controller@e8221000 {
> > > +             compatible = "arm,gic-400";
> >
> > Kind of strange that a single core A9 uses an external GIC rather than
> > the built-in one.
>
> Still have this question on v4. It should be "arm,cortex-a9-gic" if
> the A9 built-in GIC is used.

The GIC in RZ/A2 is documented to be a GIC-400.  Apparently the A9 GIC does
not have enough interrupt sources to serve all RZ/A2 peripherals.

Note that several Renesas A9 SoCs use a PL390.

https://lore.kernel.org/lkml/20150429125703.GB11757@leverpostej/
has a patch to print the GIC variant ID at runtime, to be 100% sure.

0x0000043b = arm,pl390
0x0102043b = arm,cortex-a9-gic
0x0200043b = arm,gic-400

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds



[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux