On Tue, Dec 18, 2018 at 05:12:13PM +0800, Joseph Lo wrote: > From: Peter De Schrijver <pdeschrijver@xxxxxxxxxx> > > Add new properties to configure the DFLL PWM regulator support. > > Cc: devicetree@xxxxxxxxxxxxxxx > Signed-off-by: Peter De Schrijver <pdeschrijver@xxxxxxxxxx> > Signed-off-by: Joseph Lo <josephl@xxxxxxxxxx> > --- > *V3: > - no change > *V2: > - update the binding strings and descriptions for > nvidia,pwm-tristate-microvolts > nvidia,pwm-min-microvolts > nvidia,pwm-voltage-step-microvolts > --- > .../bindings/clock/nvidia,tegra124-dfll.txt | 79 ++++++++++++++++++- > 1 file changed, 77 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt > index dff236f524a7..38e8cc8c70a8 100644 > --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt > +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt > @@ -8,7 +8,6 @@ the fast CPU cluster. It consists of a free-running voltage controlled > oscillator connected to the CPU voltage rail (VDD_CPU), and a closed loop > control module that will automatically adjust the VDD_CPU voltage by > communicating with an off-chip PMIC either via an I2C bus or via PWM signals. > -Currently only the I2C mode is supported by these bindings. > > Required properties: > - compatible : should be "nvidia,tegra124-dfll" > @@ -45,10 +44,31 @@ Required properties for the control loop parameters: > Optional properties for the control loop parameters: > - nvidia,cg-scale: Boolean value, see the field DFLL_PARAMS_CG_SCALE in the TRM. > > +Optional properties for mode selection: > +- nvidia,pwm-to-pmic: Use PWM to control regulator rather then I2C. > + > Required properties for I2C mode: > - nvidia,i2c-fs-rate: I2C transfer rate, if using full speed mode. > > -Example: > +Required properties for PWM mode: > +- nvidia,pwm-period: period of PWM square wave in microseconds. Needs unit suffix.
