[PATCH] ARM: dts: sun4i-a10: Add PMU node

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This is necessary to use 'perf' for cache profiling etc.
Tested on cubieboard with 'perf stat echo foo'.

Signed-off-by: Harald Geyer <harald@xxxxxxxxx>
---
 arch/arm/boot/dts/sun4i-a10.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

While looking into this, I noticed that the dtsi files for the allwinner
SoCs have no information about caches in them. Is this on purpose?

diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 5d46bb0139fa..a2fb473cbb9d 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -184,6 +184,11 @@
 		status = "disabled";
 	};
 
+	pmu {
+		compatible = "arm,cortex-a8-pmu";
+		interrupts = <3>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
-- 
2.11.0




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