On Fri, Dec 07, 2018 at 05:36:52PM +0100, Lucas Stach wrote:
> Hi Abel,
>
> Am Freitag, den 07.12.2018, 16:17 +0000 schrieb Abel Vesa:
> > On Fri, Nov 16, 2018 at 05:25:24PM -0600, Rob Herring wrote:
> >
> > > > +
> > > > + clk_ext1: clock-ext1 {
> > > > + compatible = "fixed-clock";
> > > > + #clock-cells = <0>;
> > > > + clock-frequency = <133000000>;
> > > > + clock-output-names = "clk_ext1";
> > > > + };
> > > > +
> > > > + clk_ext2: clock-ext2 {
> > > > + compatible = "fixed-clock";
> > > > + #clock-cells = <0>;
> > > > + clock-frequency = <133000000>;
> > > > + clock-output-names = "clk_ext2";
> > > > + };
> > > > +
> > > > + clk_ext3: clock-ext3 {
> > > > + compatible = "fixed-clock";
> > > > + #clock-cells = <0>;
> > > > + clock-frequency = <133000000>;
> > > > + clock-output-names = "clk_ext3";
> > > > + };
> > > > +
> > > > + clk_ext4: clock-ext4 {
> > > > + compatible = "fixed-clock";
> > > > + #clock-cells = <0>;
> > > > + clock-frequency= <133000000>;
> > > > + clock-output-names = "clk_ext4";
> > > > + };
> > >
> > > This is really 4 independent clocks or is 1 clock connected to 4
> > > sinks?
> >
> > According to the RM, yes, there are 4 independent clocks. Here is a
> > link to the rm:
> >
> > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.nxp.com%2Fwebapp%2FDownload%3FcolCode%3DIMX8MEVKBHUG&data=02%7C01%7Cabel.vesa%40nxp.com%7C303f3053feb94a3c1c9f08d65c623255%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636797974154936811&sdata=CuJSqDl1WiL%2Bc%2B4wYnr3ssDDpH3DorYIzLN87PNHVh4%3D&reserved=0 (page 829)
> >
> > Unfortunately, the old link (which worked without login) does not
> > work anymore.
>
> It's really 4 clock inputs to the SoC, but they may actually be
> connected to the same clock source on the board. So I really wonder if
> we should even put this into the base SoC DT, but rather push this into
> individual board DTs.
Hmm, it's part of the SoC, right ? So I would keep it in the dtsi rather than
having it duplicated into every new dts.
>
> Regards,
> Lucas
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