RE: [PATCH 19/22] ARM: dts: r8a7744-iwg20m: Add SPI NOR support

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Hi Geert,

Thanks for the feedback.

> Subject: Re: [PATCH 19/22] ARM: dts: r8a7744-iwg20m: Add SPI NOR support
>
> Hi Biju,
>
> On Tue, Nov 27, 2018 at 1:05 PM Biju Das <biju.das@xxxxxxxxxxxxxx> wrote:
> > Add support for the SPI NOR device used to boot up the system to the
> > iWave RZ/G1N Qseven System On Module DT.
> >
> > Signed-off-by: Biju Das <biju.das@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
> > +++ b/arch/arm/boot/dts/r8a7744-iwg20m.dtsi
>
> > @@ -53,6 +58,27 @@
> >         status = "okay";
> >  };
> >
> > +&qspi {
> > +       pinctrl-0 = <&qspi_pins>;
> > +       pinctrl-names = "default";
> > +
> > +       status = "okay";
> > +
> > +       /* WARNING - This device contains the bootloader. Handle with care.
> */
> > +       flash: flash@0 {
> > +               #address-cells = <1>;
> > +               #size-cells = <1>;
> > +               compatible = "sst,sst25vf016b", "jedec,spi-nor";
>
> According to the schematics, this is an ISSI IS25LP016D?
> ISSI was acquired by GigaDevice, according to Wikipedia.
> While SST is now MicroChip.

As per the schematic and BoM,  it is.
IC FLASH 16MBIT 50MHZ 8SOIC SST25VF016B-50-4I-S2AF Microchip Technology 1 U1

I agree for RZ/G1C, it is ISSI IS25LP016D.

>
> > +               reg = <0>;
> > +               spi-max-frequency = <50000000>;
> > +               spi-tx-bus-width = <1>;
> > +               spi-rx-bus-width = <1>;
>
> <1> is the default, but it's indeed good to make this explicit, as this is a QSPI
> device with 2 unwired data pins.
> However, as the device seems to support dual transfers, and dual mode uses
> the standard MOSI/MISO pins, you should use <2> for both.
> The RSPI driver supports this.
>
> The same applies to the RZ/G1M version.

SST25VF016B this doesn't support dual mode.

Please let me know are you ok with this findings.

> > +               m25p,fast-read;
> > +               spi-cpol;
> > +               spi-cpha;
> > +       };
> > +};
>
> Apart from that:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>

Regards,
Biju



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