A GPIO might be used to reset the PCI IP. Describe the property needed
in this case.
Signed-off-by: Miquel Raynal <miquel.raynal@xxxxxxxxxxx>
---
Documentation/devicetree/bindings/pci/aardvark-pci.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt
index 310ef7145c47..252934237138 100644
--- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt
+++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt
@@ -20,6 +20,10 @@ contain the following properties:
define the mapping of the PCIe interface to interrupt numbers.
- bus-range: PCI bus numbers covered
+The following are optional properties:
+
+ - reset-gpios: GPIO to reset the device
+
In addition, the Device Tree describing an Aardvark PCIe controller
must include a sub-node that describes the legacy interrupt controller
built into the PCIe controller. This sub-node must have the following
@@ -48,6 +52,7 @@ Example:
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
+ reset-gpios = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
--
2.19.1
