> +Optional properties:
> +- mediatek,tx-delay: TX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-rxid/mii interface.
> +- mediatek,rx-delay: RX clock delay macro value. Range is 0~31. Default is 0.
> + It should be defined for rgmii/rgmii-txid/mii/rmii interface.
> +- mediatek,fine-tune: boolean property, if present indicates that fine delay
> + is selected for rgmii interface.
> + If present, tx-delay/rx-delay is 170+/-50ps per stage.
> + Else tx-delay/rx-delay of coarse delay macro is 0.55+/-0.2ns per stage.
> + This property do not apply to non-rgmii PHYs.
> + Only coarse-tune delay is supported for mii/rmii PHYs.
Didn't Rob say to express the delay in pS, and have the driver convert
that to values to put into registers. That is what i would prefer.
Andrew
