On Sun, Nov 18, 2018 at 9:15 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> BTW, how do you describe a separate button connected to an NMI line?
> Or just omit it completely? Reset buttons are usually not described neither.
Just add it as a stand-alone button connected to the
NMI line of the interrupt controller. It's what it is after
all.
The ARM Juno board has an ordinary gpio button marked
"NMI". I think we should take that (in the input subsystem)
and configure it as a NMI (in ARM terms an "FIQ") but that
arch has a distinction where every IRQ line can be switched
between beeing IRQ or FIQ so it is quite different.
Anyways: NMI buttons is pretty common on some servers
I am told, I would look to x86 for an answer.
> The {clock,data}-out lines are driving TTL open-collector buffers.
> So combined with the {clock,data}-in lines, they're actually emulating
> open-collector GPIOs.
>
> So an IEC bus could be implemented using only 3 GPIOs, if two of
> them can be configured as GPIO_LINE_OPEN_DRAIN.
>
> Do you intend supporting the emulation of an open-collector GPIO in
> gpiolib using a pair of GPIOs, so avoid implementing that in every
> driver that may need it? ;-)
Somebody already suggested adding GPIOs on top of buffer
drivers in turn controlled by GPIO. So I think the answer is yes.
But it depends on this person implementing the code for it.
I can look up a reference if you're interested!
Yours,
Linus Walleij
