From: Heiko Stuebner <heiko.stuebner@xxxxxx>
Add phandles to secondary cpu cores as we may need to reference these
down the road as well.
Signed-off-by: Heiko Stuebner <heiko.stuebner@xxxxxx>
---
arch/arm/boot/dts/rk3188.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index f1f7a36b46d4..4acb501dd3f8 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -28,7 +28,7 @@
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE0>;
};
- cpu@1 {
+ cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -36,7 +36,7 @@
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE1>;
};
- cpu@2 {
+ cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
@@ -44,7 +44,7 @@
operating-points-v2 = <&cpu0_opp_table>;
resets = <&cru SRST_CORE2>;
};
- cpu@3 {
+ cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
--
2.18.0
