On Fri, Nov 09, 2018 at 08:03:48PM +1300, Chris Packham wrote:
> From: Jan Luebbe <jlu@xxxxxxxxxxxxxx>
>
> Add support for the ECC functionality as found in the DDR RAM and L2
> cache controllers on the MV78230/MV78x60 SoCs. This driver has been
> tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).
>
> Signed-off-by: Jan Luebbe <jlu@xxxxxxxxxxxxxx>
> [cp use SPDX license]
> Signed-off-by: Chris Packham <chris.packham@xxxxxxxxxxxxxxxxxxx>
> ---
> MAINTAINERS | 6 +
> drivers/edac/Kconfig | 7 +
> drivers/edac/Makefile | 1 +
> drivers/edac/armada_xp_edac.c | 630 ++++++++++++++++++++++++++++++++++
> 4 files changed, 644 insertions(+)
> create mode 100644 drivers/edac/armada_xp_edac.c
Looks ok at a glance. Those overly long lines could use some macros or
breaking but it is not a big deal:
Reviewed-by: Borislav Petkov <bp@xxxxxxx>
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
