On Wed, Mar 12, 2014 at 05:43:49AM +0400, Max Filippov wrote: > On Wed, Mar 12, 2014 at 5:08 AM, Mark Brown <broonie@xxxxxxxxxx> wrote: > > That's buggy, drivers should never configure anything more than 8 bits > > per word with regmap. > Ok, so the driver should allow for 8 bit transfers and regmap will arrange > transfers as 8-bit pairs, making CS to be asserted for 16 bits, right? > Hmmm... I see the only way to support that with that hardware: advertise > 8 bit support, buffer bytes up to 16 bits, send 16 bit words on CS deassertion > request, log violations verbosely. Other ideas? That's about it. Like I keep saying for any sort of generic use you really want to support 8 bits per word. > > You're missing the point. The controller chip select line can do what > > it likes, it's not connected to the target device if a GPIO is being > > used. > In my case SPI controller is wired directly to the codec with three > wires: SDIN, SCLK and CS. There are no registers that can control > either of these wires independently of others. Right, but other users are likely to exist and the framework has support for this so it's not much work to support.
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