From: Sven Van Asbroeck <svendev@xxxxxxxx>
This patch adds devicetree binding documentation for the
Arcx anybus bridge.
Signed-off-by: Sven Van Asbroeck <svendev@xxxxxxxx>
---
.../bindings/misc/arcx,anybus-bridge.txt | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/arcx,anybus-bridge.txt
diff --git a/Documentation/devicetree/bindings/misc/arcx,anybus-bridge.txt b/Documentation/devicetree/bindings/misc/arcx,anybus-bridge.txt
new file mode 100644
index 000000000000..cb801b7568b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/arcx,anybus-bridge.txt
@@ -0,0 +1,34 @@
+* Arcx anybus bridge
+
+This chip communicates with the SoC over a parallel bus. It is
+expected that its Device Tree node is specified as the child of a node
+corresponding to the parallel bus used for communication.
+
+Required properties:
+
+ - compatible : The following chip-specific string:
+ "arcx,anybus-bridge"
+
+ - reg : bus memory area where the cpld registers are located.
+
+ - reset-gpios : the GPIO pin connected to the reset line of the bridge.
+
+ - #reset-cells : Must be 1.
+ this bridge is a reset provider to its two embedded Anybus-S slots.
+
+Example of usage:
+
+This example places the bridge on top of the i.MX WEIM parallel bus, see:
+Documentation/devicetree/bindings/bus/imx-weim.txt
+
+&weim {
+ anybus_bridge: bridge@0,0 {
+ compatible = "arcx,anybus-bridge";
+ reg = <0 0 0x100>;
+ reset-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
+ #reset-cells = <1>;
+ /* fsl,weim-cs-timing is a i.MX WEIM bus specific property */
+ fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100
+ 0x00000000 0xa0000240 0x00000000>;
+ };
+};
--
2.17.1
