On Mon 2018-09-17 13:39:46, Lubomir Rintel wrote:
> Marvell keeps their MMP2 datasheet secret, but there are good clues
> that TWSI2 is not on 0xd4025000 on that platform, not does it use
> IRQ 58. In fact, the IRQ 58 on MMP2 seems to be a signal processor:
>
> arch/arm/mach-mmp/irqs.h:#define IRQ_MMP2_MSP 58
>
> I'm taking a somewhat educated guess that is probably a copy & paste
> error from PXA168 or PXA910 and that the real controller in fact hides
> at address 0xd4031000 and uses an interrupt line multiplexed via IRQ 17.
>
> I'm also copying some properties from TWSI1 that were missing or
> incorrect.
>
> Tested on a OLPC XO 1.75 machine, where the RTC is on TWSI2.
>
> Cc: Eric Miao <eric.y.miao@xxxxxxxxx>
> Cc: Haojian Zhuang <haojian.zhuang@xxxxxxxxx>
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Mark Rutland <mark.rutland@xxxxxxx>
> Signed-off-by: Lubomir Rintel <lkundrak@xxxxx>
Acked-by: Pavel Machek <pavel@xxxxxx>
> status = "disabled";
> };
>
> - twsi2: i2c@d4025000 {
> + twsi2: i2c@d4031000 {
> compatible = "mrvl,mmp-twsi";
> - reg = <0xd4025000 0x1000>;
> - interrupts = <58>;
> + reg = <0xd4031000 0x1000>;
> + interrupt-parent = <&intcmux17>;
> + interrupts = <0>;
> clocks = <&soc_clocks MMP2_CLK_TWSI1>;
> resets = <&soc_clocks MMP2_CLK_TWSI1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "disabled";
> };
>
--
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