Instruction loop selection would require before writing loop number registers, so enable idle, LP11 bits on loop selection register. Reference code available in BSP (in drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) (dsi_dev[sel]->dsi_inst_loop_sel.dwval = 2<<(4*DSI_INST_ID_LP11) | 3<<(4*DSI_INST_ID_DLY); Signed-off-by: Jagan Teki <jagan@xxxxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index da152c21ec62..077b57ec964c 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -397,6 +397,10 @@ static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi, struct mipi_dsi_device *device = dsi->device; u16 delay; + regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_SEL_REG, + DSI_INST_ID_HSC << (4 * DSI_INST_ID_LP11) | + DSI_INST_ID_HSD << (4 * DSI_INST_ID_DLY)); + if (device->mode_flags == MIPI_DSI_MODE_VIDEO_BURST) delay = (((mode->htotal - mode->hdisplay) * 150) / ((mode->clock / 1000) * 8)) - 50; -- 2.18.0.321.gffc6fa0e3
