On Fri, Oct 19, 2018 at 5:06 PM Paul Walmsley <paul.walmsley@xxxxxxxxxx> wrote: > > > On 10/19/18 1:45 PM, Rob Herring wrote: > > On Fri, Oct 19, 2018 at 1:48 PM Paul Walmsley <paul.walmsley@xxxxxxxxxx> wrote: > >> Add DT binding documentation for the Linux driver for the SiFive > >> asynchronous serial IP block. Nothing too exotic. > >> > >> Cc: linux-serial@xxxxxxxxxxxxxxx > >> Cc: devicetree@xxxxxxxxxxxxxxx > >> Cc: linux-riscv@xxxxxxxxxxxxxxxxxxx > >> Cc: linux-kernel@xxxxxxxxxxxxxxx > >> Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> > >> Cc: Rob Herring <robh+dt@xxxxxxxxxx> > >> Cc: Mark Rutland <mark.rutland@xxxxxxx> > >> Cc: Palmer Dabbelt <palmer@xxxxxxxxxx> > >> Reviewed-by: Palmer Dabbelt <palmer@xxxxxxxxxx> > >> Signed-off-by: Paul Walmsley <paul.walmsley@xxxxxxxxxx> > >> Signed-off-by: Paul Walmsley <paul@xxxxxxxxx> > >> --- > >> .../bindings/serial/sifive-serial.txt | 21 +++++++++++++++++++ > >> 1 file changed, 21 insertions(+) > >> create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt > >> > >> diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt > >> new file mode 100644 > >> index 000000000000..8982338512f5 > >> --- /dev/null > >> +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt > >> @@ -0,0 +1,21 @@ > >> +SiFive asynchronous serial interface (UART) > >> + > >> +Required properties: > >> + > >> +- compatible: should be "sifive,fu540-c000-uart0" or "sifive,uart0" > > I assume once again, the last '0' is a version? > > > Yes. > > > > Palmer mentioned the > > compatible string is part of the IP block repository? > > > It is, but there's no guarantee that the compatible string from the RTL > will make it into a ROM for any given chip. For example, a customer may > want the UART, but not want to take the DT ROM to keep area down. Optional? Well, that's pointless to have then. > This is one of the reasons why we'll likely switch to the usual > software-maintained DTS files for Linux, just like the rest of arch/arm, > arch/powerpc, etc. Then you should probably just follow normal conventions. I don't think DT in the h/w is the best strategy anyways. Ideally, what the h/w should have are version and capabilities (assuming there are configuration options) registers which aren't optional and can't be forgotten to be updated. The version should probably have a vendor too. > > As I mentioned for the > > intc and now the pwm block bindings, if you are going to do version > > numbers please document the versioning scheme. > > > Will add that to the binding document. I don't seem to be making my point clear. I don't want any of this added to a binding doc for particular IP blocks. Write a common doc that explains the scheme and addresses the questions I asked. Then just reference that doc here. Maybe this is documented somewhere already? Otherwise, if one is creating a new IP block, how do they know what the versioning scheme is or what goes in the DT ROM? > > > > Where does the > > number come from? > > > It comes from the RTL, which is public: > > https://github.com/sifive/sifive-blocks/blob/master/src/main/scala/devices/uart/UART.scala#L43 I'm not going to go read your RTL, sorry. Rob
