On Mon, Oct 15, 2018 at 02:11:52PM +0100, Robin Murphy wrote: > On 15/10/18 13:00, hannah@xxxxxxxxxxx wrote: > > From: Hanna Hawa <hannah@xxxxxxxxxxx> > > > > Add specific compatible string for Marvell usage due errata of > > accessing 64bit registers of ARM SMMU, in AP806. > > > > AP806 SOC use the generic ARM-MMU500, and there's no specific > > implementation of Marvell, this compatible is used for errata only. > > Given that, I think something more specific like: > > "marvell,ap806-smmu", "arm,mmu-500"; > > would be most appropriate. Otherwise, if some future Marvell SoC were to > ever come out with a *different* MMU-500 integration problem, you'd already > have painted yourself into a corner. > > Alternatively (or additionally), we could perhaps consider a separate > property like "marvell,32bit-config-access", to mirror the existing handling > of the secure integration bug. The former please. We have learned our lesson there (though for some reason, that was the *only* SMMU problem in Calxeda Midway ;) ). Rob
