On Wed, Oct 10, 2018 at 12:18:32AM -0700, Wendy Liang wrote: > Xilinx ZynqMP IPI(Inter Processor Interrupt) is a hardware block > in ZynqMP SoC used for the communication between various processor > systems. > > Signed-off-by: Wendy Liang <wendy.liang@xxxxxxxxxx> [...] > +Optional properties: > +-------------------- > +- method: The method of accessing the IPI agent registers. > + Permitted values are: "smc" and "hvc". Default is > + "smc". You are mixing the hardware messaging based mailbox and the software "smc/hvc" based mailbox together here. Please keep them separated. IIUC smc/hvc based mailcox is used for "tx" or too keep it simple in one direction and hardware based is used for "rx" or the other direction for communication. You *should not* mix them as single unit. Also lots of other vendor need SMC/HVC based mailbox. So make it generic and keep it separate. -- Regards, Sudeep
