Add documentation for gpio-addr-flash. This binding allow creating
flash devices that are paged using GPIOs.
Cc: devicetree@xxxxxxxxxxxxxxx
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@xxxxxxxxx>
---
.../bindings/mtd/mtd,gpio-addr-flash.txt | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mtd/mtd,gpio-addr-flash.txt
diff --git a/Documentation/devicetree/bindings/mtd/mtd,gpio-addr-flash.txt b/Documentation/devicetree/bindings/mtd/mtd,gpio-addr-flash.txt
new file mode 100644
index 000000000000..304a33880f9e
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/mtd,gpio-addr-flash.txt
@@ -0,0 +1,25 @@
+Memory Mapped flash with some address lines addressed using GPIOs
+
+Handle the case where a flash device is mostly addressed using physical
+line and supplemented by GPIOs. This way you can hook up say a 8MiB flash
+to a 2MiB memory range and use the GPIOs to select a particular range.
+
+ - compatible : must be "mtd,gpio-addr-flash", "cfi-flash";
+ - reg : Address range of the mtd chip that is memory mapped, this is,
+ on the previous example 2MiB.
+ - addr-gpios: List of GPIO specifiers that will be used to address the MSBs
+ address lines. The order goes from LSB to MSB.
+
+For the rest of the properties, see mtd-physmap.txt.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. Check partition.txt for more details.
+
+Example:
+
+ flash@300000 {
+ compatible = "mtd,gpio-addr-flash", "cfi-flash";
+ bank-width = <2>;
+ reg = < 0x00300000 0x00200000 >;
+ addr-gpios = <&gpio_0 3 0>, <&gpio_0 4 0>;
+ } ;
--
2.19.0
