On Wed, 26 Sep 2018 00:27:56 +0800, Dong Aisheng wrote: > The System Controller Firmware (SCFW) is a low-level system function > which runs on a dedicated Cortex-M core to provide power, clock, and > resource management. It exists on some i.MX8 processors. e.g. i.MX8QM > (QM, QP), and i.MX8QX (QXP, DX). > > Cc: Shawn Guo <shawnguo@xxxxxxxxxx> > Cc: Sascha Hauer <kernel@xxxxxxxxxxxxxx> > Cc: Fabio Estevam <fabio.estevam@xxxxxxx> > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Cc: Mark Rutland <mark.rutland@xxxxxxx> > Cc: devicetree@xxxxxxxxxxxxxxx > Signed-off-by: Dong Aisheng <aisheng.dong@xxxxxxx> > --- > v5->v6: > * add input clocks to clock bindings according to Rob's suggestion > * typo clean up > v4->v5: > * scu node should be under firmware node > * add pd/clk/pinctrl binding as well according to Rob's suggestion > * switch to new generic MU binding > Use 8 separate mu channels in one MU instance for SCU communication > v3->v4: > * fully change to mailbox binding > * add child node description > v2->v3: > * update a bit to mailbox binding > v1->v2: > * remove status > * changed to mu1 > --- > .../devicetree/bindings/arm/freescale/fsl,scu.txt | 183 +++++++++++++++++++++ > 1 file changed, 183 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt > Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
