Hi Boris, Thanks for the review. > -----Original Message----- > From: Borislav Petkov [mailto:bp@xxxxxxxxx] > Sent: Monday, September 24, 2018 2:52 PM > To: Manish Narani <MNARANI@xxxxxxxxxx> > Cc: robh+dt@xxxxxxxxxx; mark.rutland@xxxxxxx; mchehab@xxxxxxxxxx; > Michal Simek <michals@xxxxxxxxxx>; leoyang.li@xxxxxxx; > sudeep.holla@xxxxxxx; amit.kucheria@xxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; linux- > edac@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH v7 4/7] edac: synopsys: Add macro defines for ZynqMP > DDRC > > On Mon, Sep 17, 2018 at 07:55:02PM +0530, Manish Narani wrote: > > Add macro defines for ZynqMP DDR controller. These macros will be used > > for ZyqnMP ECC operations. > > > > Signed-off-by: Manish Narani <manish.narani@xxxxxxxxxx> > > --- > > drivers/edac/synopsys_edac.c | 168 > > +++++++++++++++++++++++++++++++++++++++++++ > > 1 file changed, 168 insertions(+) > > > > diff --git a/drivers/edac/synopsys_edac.c > > b/drivers/edac/synopsys_edac.c index eb458e5..6bf7959 100644 > > --- a/drivers/edac/synopsys_edac.c > > +++ b/drivers/edac/synopsys_edac.c > > @@ -97,6 +97,174 @@ > > #define SCRUB_MODE_MASK 0x7 > > #define SCRUB_MODE_SECDED 0x4 > > > > +/* DDR ECC Quirks */ > > +#define DDR_ECC_INTR_SUPPORT BIT(0) > > +#define DDR_ECC_DATA_POISON_SUPPORT BIT(1) > > All those new additions are one column further to the left than the old ones. > Why? > > Is there some significance here or can they all be vertically aligned? Should I increase the alignment of the existing macros in the 'code formatting' patches? New macros will need an increased indentation. Thanks, Manish
