> Phil Elwell <phil@xxxxxxxxxxxxxxx> hat am 17. September 2018 um 10:22 geschrieben: > > > Use the compatible string in the DTB to select the correct cache line > size for the SoC - 32 for BCM2835, and 64 for BCM2836 and BCM2837. > > Signed-off-by: Phil Elwell <phil@xxxxxxxxxxxxxxx> Tested-by: Stefan Wahren <stefan.wahren@xxxxxxxx>
