Add device-tree bindings documentation for SNPS DesignWare MIPI D-PHY in RX mode. Signed-off-by: Luis Oliveira <lolivei@xxxxxxxxxxxx> --- Changelog v2: - no changes .../devicetree/bindings/phy/snps,dphy-rx.txt | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/snps,dphy-rx.txt diff --git a/Documentation/devicetree/bindings/phy/snps,dphy-rx.txt b/Documentation/devicetree/bindings/phy/snps,dphy-rx.txt new file mode 100644 index 0000000..9079f4a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/snps,dphy-rx.txt @@ -0,0 +1,36 @@ +Synopsys DesignWare MIPI Rx D-PHY block details + +Description +----------- + +The Synopsys MIPI D-PHY controller supports MIPI-DPHY in receiver mode. +Please refer to phy-bindings.txt for more information. + +Required properties: +- compatible : Shall be "snps,dphy-rx". +- #phy-cells : Must be 1. +- snps,dphy-frequency : Output frequency of the D-PHY. +- snps,dphy-te-len : Size of the communication interface (8 bits->8 or 12bits->12). +- reg : Physical base address and size of the device memory mapped + registers; + +Optional properties: +- snps,compat-mode : Compatibility mode control + +The per-board settings: +- gpios : Synopsys testchip used as reference uses this to change setup + configurations. + +Example: + + mipi_dphy_rx1: dphy@3040 { + compatible = "snps,dphy-rx"; + #phy-cells = <1>; + snps,dphy-frequency = <300000>; + snps,dphy-te-len = <12>; + snps,compat-mode = <1>; + reg = < 0x03040 0x20 + 0x08000 0x100 + 0x09000 0x100>; + }; + -- 2.9.3