Hi Geert, On Tuesday, September 18, 2018, linux-renesas-soc-owner@xxxxxxxxxxxxxxx wrote: > > I've coded this up and it works fine. > > While I don't doubt this works fine, your DT is no longer describing > hardware, but also software policy. > > I think the proper solution, maximizing code reuse, is to: > - Split off early clocks from cpg_mssr_info.core_clks[] and .mod_clk[] > into > cpg_mssr_info.early_core_clks[] and .early_mod_clks[], This is where I got into trouble. I originally just tried to register all the core clocks in the early init. But then I had issues when the platform probe came in later and wanted to do the same thing. For example, the clock tree for OSTM is: EXTAL -> PLL -> P1C -> OSTM Of course there are other non-early module that use the P1C clock. Do you think it would be OK if I just registers all the core clock in early init, then just pass back the clk pointers to cpg_mssr_probe later (to let the platform driver manage them)? Chris
