[3/3] Device Tree for ASUS Tinker Board S : Enable WiFi

[beagleboard@xxxxxxxxxxxxxxxxxxx]

This patch enables wifi on the ASUS tinker board S.

Its based on: 
https://github.com/TinkerBoard/debian_kernel/commit/6a3128ade33f758887048578ada61a4b7ab8e678

The changes here are more extensive, basic communication is via sdio0, 
but can also be seen that connections are set up to the RK808 e.g. the 
power management chip.

Now I believe the original tinker board also had wi-fi - so why this 
isn't enabled on the rk3288-tinker.dts isn't clear to me. I suspect it 
should be on both.

Regards,

David Summers.


diff --git a/arch/arm/boot/dts/rk3288-tinkerS.dts 
b/arch/arm/boot/dts/rk3288-tinkerS.dts
index 9d113418a9c9..2465cddf2f26 100644
--- a/arch/arm/boot/dts/rk3288-tinkerS.dts
+++ b/arch/arm/boot/dts/rk3288-tinkerS.dts
@@ -21,6 +21,27 @@
                device_type = "memory";
        };

+       wireless-bluetooth {
+               compatible = "bluetooth-platdata";
+               uart_rts_gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
+               pinctrl-names = "default","rts_gpio";
+               pinctrl-0 = <&uart0_rts>;
+               pinctrl-1 = <&uart0_gpios>;
+               BT,reset_gpio    = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+               BT,wake_gpio     = <&gpio4 26 GPIO_ACTIVE_HIGH>;
+               BT,wake_host_irq = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+               status = "okay";
+       };
+
+       wireless-wlan {
+               compatible = "wlan-platdata";
+               rockchip,grf = <&grf>;
+               wifi_chip_type = "ap6212";
+               sdio_vref = <1800>;
+               WIFI,host_wake_irq = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+               status = "okay";
+       };
+
        ext_gmac: external-gmac-clock {
                compatible = "fixed-clock";
                #clock-cells = <0>;
@@ -28,7 +49,32 @@
                clock-output-names = "ext_gmac";
        };

-       gpio-keys {
+       io-domains {
+               compatible = "rockchip,rk3288-io-voltage-domain";
+               rockchip,grf = <&grf>;
+               flash0-supply = <&vcc_flash>;
+               gpio30-supply = <&vcc_io>;
+               wifi-supply = <&vcc_18>;
+               sdcard-supply = <&vccio_sd>;
+       };
+
+       sdio_pwrseq: sdio-pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               clocks = <&rk808 1>;
+               clock-names = "ext_clock";
+               pinctrl-names = "default";
+               pinctrl-0 = <&chip_enable_h>, <&wifi_enable_h>;
+
+               /*
+                * On the module itself this is one of these (depending
+                * on the actual card populated):
+                * - SDIO_RESET_L_WL_REG_ON
+                * - PDN (power down when low)
+                */
+               reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 27 
GPIO_ACTIVE_LOW>;
+       };
+
+gpio-keys {
                compatible = "gpio-keys";
                #address-cells = <1>;
                #size-cells = <0>;
@@ -101,6 +147,14 @@
                startup-delay-us = <100000>;
                vin-supply = <&vcc_io>;
        };
+
+       vcc_flash: flash-regulator {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc_flash";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               vin-supply = <&vcc_io>;
+       };
 };

 &cpu0 {
@@ -389,6 +443,15 @@
                };
        };

+       sdio-pwrseq {
+               wifi_enable_h: wifi-enable-h {
+                       rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+               chip_enable_h: chip-enable-h {
+                       rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        sdmmc {
                sdmmc_bus4: sdmmc-bus4 {
                        rockchip,pins = <6 16 RK_FUNC_1 
&pcfg_pull_up_drv_8ma>,
@@ -420,6 +483,12 @@
                        rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
                };
        };
+
+       wireless-bluetooth {
+               uart0_gpios: uart0-gpios {
+                       rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
 };

 &pwm0 {
@@ -431,6 +500,24 @@
        status ="okay";
 };

+&sdio0 {
+       status = "okay";
+       clock-frequency = <50000000>;
+       clock-freq-min-max = <200000 50000000>;
+       bus-width = <4>;
+       cap-sd-highspeed;
+       cap-sdio-irq;
+       disable-wp;
+       keep-power-in-suspend;
+       mmc-pwrseq = <&sdio_pwrseq>;
+       non-removable;
+       num-slots = <1>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+       sd-uhs-sdr104;
+       supports-sdio;
+};
+
 &sdmmc {
        bus-width = <4>;
        cap-mmc-highspeed;
@@ -451,6 +552,8 @@
 };

 &uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_xfer>, <&uart0_cts>;
        status = "okay";
 };