On Tue, Aug 28, 2018 at 10:28 PM Prabhakar Kushwaha
<prabhakar.kushwaha@xxxxxxx> wrote:
>
> As per IFC binding, Absence of "little-endian" field causes registers
> access in big-endian mode.
> So no need to set explicit big-endian field IFC node for LS1043A and
> LS1046A.
>
> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@xxxxxxx>
Acked-by: Li Yang <leoyang.li@xxxxxxx>
> ---
> Changes for v2: Incorporated Leo's comments
> - Remove new line between copyrights
>
> arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 2 +-
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> index b9f5d2ff4ff2..68af84a8ade8 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -3,6 +3,7 @@
> * Device Tree Include file for Freescale Layerscape-1043A family SoC.
> *
> * Copyright 2014-2015 Freescale Semiconductor, Inc.
> + * Copyright 2018 NXP
> *
> * Mingkai Hu <Mingkai.hu@xxxxxxxxxxxxx>
> */
> @@ -280,7 +281,6 @@
> ifc: ifc@1530000 {
> compatible = "fsl,ifc", "simple-bus";
> reg = <0x0 0x1530000 0x0 0x10000>;
> - big-endian;
> interrupts = <0 43 0x4>;
> };
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index 65ce1c3cb568..ae4ca865131b 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -3,6 +3,7 @@
> * Device Tree Include file for Freescale Layerscape-1046A family SoC.
> *
> * Copyright 2016 Freescale Semiconductor, Inc.
> + * Copyright 2018 NXP
> *
> * Mingkai Hu <mingkai.hu@xxxxxxx>
> */
> @@ -198,7 +199,6 @@
> ifc: ifc@1530000 {
> compatible = "fsl,ifc", "simple-bus";
> reg = <0x0 0x1530000 0x0 0x10000>;
> - big-endian;
> interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> --
> 2.14.1
>
