Fifth version can be found here: https://lkml.org/lkml/2018/8/20/83 Changes since v5: * Fixed the predivider and divider register values as reported by Sascha. * Changed the commit message of the 4th patch to match with what the commit is adding Changes since v4: * Implemented divider ops and used clk-composite as suggested by Sascha Hauer. Changes since v3: * Added a composite clock type to get rid of some complexity from clk-imx8mq. This new composite clock type will also be used by all the imx8 socs that will follow. * Added back the reviewed-by tag. Abel Vesa (1): clk: imx: add imx composite clock Lucas Stach (4): dt-bindings: add binding for i.MX8MQ CCM clk: imx: add fractional PLL output clock clk: imx: add SCCG PLL type clk: imx: add clock driver for i.MX8MQ CCM .../devicetree/bindings/clock/imx8mq-clock.txt | 20 + drivers/clk/imx/Makefile | 6 +- drivers/clk/imx/clk-composite.c | 157 +++++ drivers/clk/imx/clk-frac-pll.c | 230 ++++++++ drivers/clk/imx/clk-imx8mq.c | 631 +++++++++++++++++++++ drivers/clk/imx/clk-sccg-pll.c | 231 ++++++++ drivers/clk/imx/clk.h | 57 ++ include/dt-bindings/clock/imx8mq-clock.h | 410 +++++++++++++ 8 files changed, 1741 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/clock/imx8mq-clock.txt create mode 100644 drivers/clk/imx/clk-composite.c create mode 100644 drivers/clk/imx/clk-frac-pll.c create mode 100644 drivers/clk/imx/clk-imx8mq.c create mode 100644 drivers/clk/imx/clk-sccg-pll.c create mode 100644 include/dt-bindings/clock/imx8mq-clock.h -- 2.7.4
