On Wed, Aug 15 2018 at 09:28 -0600, Stephen Boyd wrote:
Quoting Lina Iyer (2018-08-14 10:30:58)Add PDC interrupt controller device bindings for SDM845. Signed-off-by: Lina Iyer <ilina@xxxxxxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 24e254efb9d1..399bfbd52c5b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1106,6 +1106,15 @@ }; }; + pdc: interrupt-controller@b220000 {Please sort this by unit address within the SoC node.
Ah, didn't realize that. Will fix. -- Lina
+ compatible = "qcom,sdm845-pdc"; + reg = <0xb220000 0x30000>; + qcom,pdc-ranges = <0 512 94>, <94 641 15>, <115 662 7>; + #interrupt-cells = <2>; + interrupt-parent = <&intc>; + interrupt-controller; + }; + timer@17c90000 { #address-cells = <1>; #size-cells = <1>;
