Hi Thor, Did you saw my patch? I think the default configuration for the timer interrupt should be <1 13 0xf01> Otherwise, the driver get the error "GIC: PPI13 is secure or misconfigured" Base on the ARM documentation it is a edge sensitive trigger: http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/CCHEIGIC.html Or do I understand something wrong? Best regards, Silvan On 02.08.2018 13:41, Silvan Murer wrote: > Signed-off-by: Silvan Murer <silvan.murer@xxxxxxxxx> > --- > arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi > index 791ca15..52a7025 100644 > --- a/arch/arm/boot/dts/socfpga_arria10.dtsi > +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi > @@ -748,7 +748,7 @@ > timer@ffffc600 { > compatible = "arm,cortex-a9-twd-timer"; > reg = <0xffffc600 0x100>; > - interrupts = <1 13 0xf04>; > + interrupts = <1 13 0xf01>; > clocks = <&mpu_periph_clk>; > }; > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html