On Fri, 27 Jul 2018 12:56:54 +0200
Emmanuel Vadot <manu@xxxxxxxxxxxxxxxx> wrote:
> On Thu, 26 Jul 2018 13:54:09 +0200
> Maxime Ripard <maxime.ripard@xxxxxxxxxxx> wrote:
>
> > On Tue, Jul 24, 2018 at 04:55:01PM +0200, Emmanuel Vadot wrote:
> > > On Tue, 24 Jul 2018 16:42:18 +0200
> > > Maxime Ripard <maxime.ripard@xxxxxxxxxxx> wrote:
> > >
> > > > On Tue, Jul 24, 2018 at 03:34:32PM +0200, Emmanuel Vadot wrote:
> > > > > On Tue, 24 Jul 2018 15:00:04 +0200
> > > > > Maxime Ripard <maxime.ripard@xxxxxxxxxxx> wrote:
> > > > >
> > > > > > On Tue, Jul 24, 2018 at 12:15:22PM +0200, Emmanuel Vadot wrote:
> > > > > > > The SID controller on H5 look the same as the one present in the A64.
> > > > > > > But in case we find some difference one day at a compatible string
> > > > > > > of it's own and a fallback to the A64 one.
> > > > > > >
> > > > > > > Signed-off-by: Emmanuel Vadot <manu@xxxxxxxxxxx>
> > > > > > > ---
> > > > > > > arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 5 +++++
> > > > > > > 1 file changed, 5 insertions(+)
> > > > > > >
> > > > > > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> > > > > > > index 62d646baac3c..28183bf77164 100644
> > > > > > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> > > > > > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
> > > > > > > @@ -129,3 +129,8 @@
> > > > > > > <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> > > > > > > compatible = "allwinner,sun50i-h5-pinctrl";
> > > > > > > };
> > > > > > > +
> > > > > > > +&sid {
> > > > > > > + compatible = "allwinner,sun50i-h5-sid",
> > > > > > > + "allwinner,sun50i-a64-sid";
> > > > > > > +};
> > > > > >
> > > > > > This is still a bit pointless, please remove the common node.
> > > > >
> > > > > You mean directly declare sid controller in the SoC dtsi and not
> > > > > have a common node in sunxi-h3-h5.dtsi ?
> > > >
> > > > Yep
> > >
> > > The reason I've put it in the common file is because I'll send patches
> > > for the nvmem-cells needed for thermal, and those are common between
> > > the two. Other nvmem-cells are also common (like the chipid and
> > > probably other).
> >
> > Then we'll see what we can have in common and what not when we'll have
> > something in common?
>
> Will it make more sense that I just send a new series with nvmem-cells
> now along with thermal bindings ?
My bad, I remembered H5 thermal sensor being the same as H3 but I was
wrong.
I'll send a v3 with your changes suggestion and we'll see later for
thermal sensor.
> > Maxime
> >
> > --
> > Maxime Ripard, Bootlin (formerly Free Electrons)
> > Embedded Linux and Kernel engineering
> > https://bootlin.com
>
>
> --
> Emmanuel Vadot <manu@xxxxxxxxxxxxxxxx> <manu@xxxxxxxxxxx>
>
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--
Emmanuel Vadot <manu@xxxxxxxxxxxxxxxx> <manu@xxxxxxxxxxx>
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