Hi Geert,
On Thursday, July 26, 2018, Geert Uytterhoeven wrote:
> Hi Chris,
>
> On Wed, Jul 25, 2018 at 4:39 PM Chris Brandt <chris.brandt@xxxxxxxxxxx>
> wrote:
> > Some devices with SCIx_SH4_SCIF_REGTYPE have no space between registers.
> > Use the register area size to determine the spacing between register.
> >
> > Signed-off-by: Chris Brandt <chris.brandt@xxxxxxxxxxx>
>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Thank you.
> > + if (p->regtype == SCIx_SH4_SCIF_REGTYPE)
> > + if (sci_port->reg_size >= 0x20)
> > + port->regshift = 1;
> > +
>
> So you have to be careful not to round up the reg size in DT to the next
> power of two (0x20), like you did for RZ/A1 (64 is used there).
Me????
It was Wolfram that committed the RZ/A1 DT scif code back in 2014 ;)
Chris
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