On Tue, 24 Jul 2018 17:57:17 +0200 Wolfram Sang <wsa@xxxxxxxxxxxxx> wrote: > > I think an SoC design we will likely see is an i3c master multiplexed with > > an i2c master to access one bus. The i2c master can then use clock > > stretching and other things that may not work in the i3c master, and it > > may be used in the absence of proper i3c drivers in the OS. > > Multiplexed? Well, as soon you want to use I3C features like IBI, this > is not going to work, right? It will not even work with Linux being an > I2C slave itself. Or do you mean running the I3C and I2C controller > simultaneously using the same wires? I think we should switch to an I3C mindset. It seems the use cases we're discussing so far are I2C use cases. Keep in mind that I3C bus management is completely different from I2C one (event if I3C is backward compatible with I2C, it's just a feature, not the foundation of the I3C protocol). -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
