Hardware (S5Pv210 and all Exynos SoCs) provides only 32 external interrupts which can wakeup device from deep sleep modes. On S5Pv210 these are gph0-gph3. On all Exynos designs these are gpx0-gpx3. There is only pne 32-bit register for controlling the external wakeup interrupt mask (masking and unmasking waking capability of these interrupts). This lead to implementation in pinctrl driver and machine code which was using static memory for storing the mask value and not caring about multiple devices of pin controller... because only one pin controller device will be handling these. This corresponds to hidden assumption in parsing the Device Tree. Make this assumption an explicit requirement. Signed-off-by: Krzysztof Kozlowski <krzk@xxxxxxxxxx> --- Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index 5e00a21de2bf..f7700c9e0d0b 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -145,8 +145,13 @@ A. External GPIO Interrupts: For supporting external gpio interrupts, the B. External Wakeup Interrupts: For supporting external wakeup interrupts, a child node representing the external wakeup interrupt controller should be - included in the pin-controller device node. This child node should include - the following properties. + included in the pin-controller device node. + + Only one pin-controller device node can include external wakeup interrupts + child node (in other words, only one External Wakeup Interrupts + pin-controller is supported). + + This child node should include following properties: - compatible: identifies the type of the external wakeup interrupt controller The possible values are: -- 2.14.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html