Instead of relying on default values, configure PAD_AUD3_BB_CK to be a
GPIO explicitly. While at, it change the pad configuration to enable
a 100K pull-down (the pin is used as IRQ_TYPE_LEVEL_HIGH).
Cc: Fabio Estevam <fabio.estevam@xxxxxxx>
Cc: Nikita Yushchenko <nikita.yoush@xxxxxxxxxxxxxxxxxx>
Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Cc: cphealy@xxxxxxxxx
Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Mark Rutland <mark.rutland@xxxxxxx>
Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
Cc: Andrew Lunn <andrew@xxxxxxx>
Reviewed-by: Andrew Lunn <andrew@xxxxxxx>
Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
---
arch/arm/boot/dts/imx51-zii-scu3-esb.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
index 2941a92d40f1..0bb42c00d72b 100644
--- a/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
+++ b/arch/arm/boot/dts/imx51-zii-scu3-esb.dts
@@ -221,6 +221,8 @@
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_switch>;
ports {
#address-cells = <1>;
@@ -426,6 +428,12 @@
>;
};
+ pinctrl_switch: switchgrp {
+ fsl,pins = <
+ MX51_PAD_AUD3_BB_CK__GPIO4_20 0xc5
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
--
2.17.1
--
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