Eddie, > Thanks for the details. I have sent up a new series which will only do the > bus reset if SDA is low. With our current hardware configuration, this Thanks. > *should* be sufficient to recover all the possible errors. However, there > are configurations where it will not be enough, in which case getting the > data line stuck high or clock line stuck either high or low can occur, > necessitating the full reset. But since I can't demonstrate those at the > moment, I can't argue to include that now :) For the record, I am *really* interested in these cases. Just from reading the above I wonder how SDA can stuck high when being open drain, and how you will create 9 SCL pulses if SCL is stuck low. But if we have a test case, we will figure out something together. Thanks, Wolfram
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